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Microchip Technology /ATSAME70Q20 /PIOA /PDR

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Interpret as PDR

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https://regviz.com/r/Atmel/AT91SAM9G10/PIOB/PDR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (P0)P0 0 (P1)P1 0 (P2)P2 0 (P3)P3 0 (P4)P4 0 (P5)P5 0 (P6)P6 0 (P7)P7 0 (P8)P8 0 (P9)P9 0 (P10)P10 0 (P11)P11 0 (P12)P12 0 (P13)P13 0 (P14)P14 0 (P15)P15 0 (P16)P16 0 (P17)P17 0 (P18)P18 0 (P19)P19 0 (P20)P20 0 (P21)P21 0 (P22)P22 0 (P23)P23 0 (P24)P24 0 (P25)P25 0 (P26)P26 0 (P27)P27 0 (P28)P28 0 (P29)P29 0 (P30)P30 0 (P31)P31

Description

PIO Disable Register

Fields

P0

PIO Disable
P1

PIO Disable
P2

PIO Disable
P3

PIO Disable
P4

PIO Disable
P5

PIO Disable
P6

PIO Disable
P7

PIO Disable
P8

PIO Disable
P9

PIO Disable
P10

PIO Disable
P11

PIO Disable
P12

PIO Disable
P13

PIO Disable
P14

PIO Disable
P15

PIO Disable
P16

PIO Disable
P17

PIO Disable
P18

PIO Disable
P19

PIO Disable
P20

PIO Disable
P21

PIO Disable
P22

PIO Disable
P23

PIO Disable
P24

PIO Disable
P25

PIO Disable
P26

PIO Disable
P27

PIO Disable
P28

PIO Disable
P29

PIO Disable
P30

PIO Disable
P31

PIO Disable

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data